Development of SiC MOSFET Electrical Model and Experimental Validation: Improvement and Reduction of Parameter Number - LAAS - Laboratoire d'Analyse et d'Architecture des Systèmes
Communication Dans Un Congrès Année : 2019

Development of SiC MOSFET Electrical Model and Experimental Validation: Improvement and Reduction of Parameter Number

Résumé

In this work, a new approach for electrical modeling of Silicon Carbide (SiC) MOSFET is presented. The developed model is inspired by the Curtice model which is using a mathematic function reflecting MOSFET output characteristics. The first simulation results showed good agreement with measurements. Improvement is needed in order to increase model accuracy and to take into account the influence of the junction temperature on device characteristics.
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Dates et versions

hal-02613777 , version 1 (09-01-2024)

Identifiants

Citer

Nguyen Quang, Patrick Tounsi, Jean-Pierre Fradin, Jean-Michel Reynes. Development of SiC MOSFET Electrical Model and Experimental Validation: Improvement and Reduction of Parameter Number. 26th International Conference "Mixed Design of Integrated Circuits and Systems" (MIXDES 2019), Jun 2019, Rzeszów, Poland. pp.298 - 301, ⟨10.23919/MIXDES.2019.8787050⟩. ⟨hal-02613777⟩
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