@incollection{poittevin:hal-03371673, TITLE = {{3D Logic Cells Design and Results Based on Vertical NWFET Technology Including Tied Compact Model}}, AUTHOR = {Poittevin, Arnaud and Mukherjee, Chhandak and O'Connor, Ian and Maneux, Cristell and Larrieu, Guilhem and Deng, Marina and Le Beux, S{\'e}bastien and Marc, Fran{\c c}ois and Lecestre, Aur{\'e}lie and Marchand, C{\'e}dric and Kumar, Abhishek}, URL = {https://laas.hal.science/hal-03371673}, BOOKTITLE = {{VLSI-SoC: Design Trends}}, HAL_LOCAL_REFERENCE = {Rapport LAAS n{\textdegree} 21297}, PUBLISHER = {{Springer International Publishing}}, SERIES = {IFIP Advances in Information and Communication Technology}, VOLUME = {621}, PAGES = {301-321}, YEAR = {2021}, MONTH = Jul, DOI = {10.1007/978-3-030-81641-4\_14}, HAL_ID = {hal-03371673}, HAL_VERSION = {v1}, }