Power electronics devices has become a vital part of today electronic infrastructure and systems. However, even the ultimate converter is limited by the performance of his components. Today silicon devices have reached their limits: wide band gap materials like GaN are promising but will show some restrictions in breakdown voltage or temperature behaviour. Diamond stands out to be an interesting candidate for power applications. In this work we present the fabrication process of vertical PIN diodes on p-type (100) diamond of 4.6 x 4.8 mm². The corresponding epilayer structure is a n+/n- stack with a 230 nm n+ layer and a 2,24 µm n- layer respectively phosphorous doped at 2.5 x 1019 cm-3 and 2.3 x 1015 cm-3. The p+ substrate (» 300 µm) is boron doped at 3 x 1020 cm-3. The doping concentrations were obtained by SIMS analysis. The fabrication process will be presented: vertical diodes were patterned with various shapes (circular and square) and sizes (from 150 µm to 300 µm diameter) in order to investigate the influence of edge effects on their electrical behaviour. Specific diodes for optical beam induced current (OBIC) test were also designed. The two major fabrication steps are the realization of ohmic contacts on n+ and p+ sides with Ti/Pt/Au metallization, and the isolation of the different diodes by oxygen plasma etching. First I(V) measurements performed under probe at room temperature highlight a diode behaviour with rectifying factor of 2.35x104. Direct current is limited by the high resistance of the N- layer. Complementary electrical characterizations are still undergoing (influence of the temperature, C(V)). In complement of those classic characterizations OBIC test will be performed to evaluate the electric field distribution in the diamond vertical PIN diode. Results will be compared with TCAD simulations