New reliability model for power SiC MOSFET technologies under static and dynamic gate stress
Résumé
This work investigates the V th degradation of commercial power SiC MOSFET technologies under HTGB and AC stresses with Gate Switching Stress conditions by using relatively accelerated tests whose stressors do not exceed the datasheet specifications. A new model that takes into consideration the variability of the exponent of powerlaw for V th drift has been proposed and experimentally verified on planar and trench technologies. The proposed model is useful to estimate accurately the lifetime for any condition or complex mission profile.