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Communication Dans Un Congrès Année : 2023

Chip or Wafer -Small quantity fabrication

Résumé

In the academic research activities in the cleanroom, where mass production is rarely required or substrate to be processed is sometimes limited in size, devices are often fabricated using diced chips rather than wafers. However, such fabrication often struggles to maintain quality, in part because of inhomogeneity on the small chip and the different chip size among users, which requires process optimization for each. One possible solution is to standardize processing chips attached to or embedded in a dummy wafer.
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Dates et versions

hal-04131044 , version 1 (16-06-2023)

Identifiants

  • HAL Id : hal-04131044 , version 1

Citer

Shun Yasunaga, David Bourrier, Naonobu Shimamoto, Ayako Mizushima, Hugues Granier, et al.. Chip or Wafer -Small quantity fabrication. 3rd European Symposium on Nanofabrication Research Infrastructure - ENRIS 2023, Renatech Euronanolab, May 2023, Paris Saclay, France. ⟨hal-04131044⟩
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