The reduction in size of the active technologies allows applications towards ever higher frequencies. However, the exploitation of these frequency bands requires a fundamental redefinition of the architectures due to more significant losses than at low frequencies; it is from this assimilation of new architectures based on networks of programmable directional antennas, together with the use of high-performance technologies that frequencies above 30 GHz can be fully exploited for telecommunications, defense and commercial applications. In the architectures adopted for the generation of 5G communications systems, the requirements relate to both a strong hardware integration as well as a high power requirement in the Ku, K and Ka bands. In addition, the gain in technological maturity of GaN technologies makes them eligible to claim the design of power modules at these frequencies. Indeed, the Tx-Rx circuits traditionally produced in SiGe or GaAs technology are increasingly associated with (or even replaced by) elements in GaN technology. Trends in the use of this technology no longer limit it to the power segment for high frequency amplification. Robust receivers have proven the advantage of this technology in reception stage (LNA), and other works report advantageous performances for the synthesis of stable high frequency oscillators. In this logic, the the founder OMMIC wanted to complete the range of products already available, by motivating a study on the design of multi-function chips (programmable attenuators-phase shifters) MMIC in GaN technology. The aim of this work is to demonstrate in the long term the advantages that we can derive from fully integrated GaN modules on the one hand, and to carry out the first Ka-core core-chip work on this GaN technology on the other hand. In fact, to our knowledge, there is no core-chip signal control circuit made in this technology. This thesis therefore has the double objective of demonstrating the feasibility of such circuits, and of proposing a design methodology to tend towards the best possible performances. To achieve the first objective, after an in-depth bibliographic study, we know that GaN field effect technology does not have the most favorable intrinsic properties for performing such functions; a specific analysis of each circuit is carried out on two types of outputs (single ended and differential cells). It therefore represents a challenge to meet this first objective. This is why, in a second step, we made a specific effort on the design methodology, which is divided into two parts: the design of individual cells of the core-chip and then the pooling of these. We realized that poor control of this cell assembly step could lead to degraded performance.[...]