This paper presents an optimization of the Sequential Spatial Adaptive Sampling (SSAS) algorithm to accelerate near-field scanning of printed circuit boards or integrated circuits. The first originality of this approach is to configure this algorithm from the spatial distribution characteristic of near field on a planar surface. The second originality is to propose three selection criteria to adjust the targeted accuracy with the objective to reduce the measurement time. The low time-consuming algorithm selects only measurement points, which carry the most information, in order to reduce significantly the number of captured points without increasing the measurement error. The analysis of measurement results, based on this algorithm applied on two case studies, validates its effectiveness compared to the classical full regular grid sampling.